The Sixth Low-Level Radio Frequency Workshop
Dates: Tuesday, October 1st to Friday October 4, 2013
Location: Granlibakken Resort, Lake Tahoe, California, USA
Host Institutions: LBNL and SLAC
Sophisticated and robust Low-Level RF systems are essential to control RF structures and their power sources in modern particle accelerators. The goals of LLRF2013 are to share experiences, present status of our work, and discuss developments and prospects in the field.
Workshop format
Much of each workshop day will consist of circa. 20-minute talks, single-track, with additional time for discussion. One 45-minute tutorial per day will cover fundamental aspects of LLRF system design. A poster session will be held on the third day of the workshop following the morning talks. We encourage attendees to submit an abstract for a poster or talk, but this is not a requirement for attendance. Student and post-doc presentations and participation are particularly encouraged.
See the simplified schedule, or the full-featured indico schedule; the two are intended to agree.
Sponsors
Exhibitors
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Topical areas
- Reviews of low-level RF experience and activities at various laboratories
- State-of-the art results/performance in production facilities
- Techniques for in-situ automated cavity testing/commissioning
- Integration with machine and system protection
- Integration with instrumentation and fast orbit feedback
- Behavior of and interfacing to high-efficiency class-F amplifiers
- Fast tuner control (e.g., piezoelectrics and microphonics)
- SoC in FPGA with and without embedded (hard or soft core) processor(s)
- New hardware, modularity paradigms, mechanical-thermal design ideas
- Collaboration on Open Systems (hardware, gateware, software)
Application/Accelerator specific needs and techniques
- Controlling impedance of circular machines
- Linac-based coherent X-ray light sources
- Photocathode drive lasers and end-station lasers
- Deflecting cavities
Tutorials
- DSP part I: Basic theory
- DSP part II: Real-life implementation in FPGAs
- DSP part III: Avoiding resource overutilization in FPGAs
- DSP part IV: System simulation from design through commissioning
- Industry: Realizing the Potential of High-Performance Data Converters
Program committee
Brian Chase (FNAL)
Mark Crofford (ORNL)
Larry Doolittle (LBNL)
Mariusz Grecki (DESY)
Wolfgang Hofle (CERN)
Curt Hovater (Jefferson Lab)
Matthias Liepe (Cornell)
Shinichiro Michizono (KEK)
Alex Ratti (LBNL)
Stefan Simrock (ITER)
Kevin Smith (BNL)
Steve Smith (SLAC)
Dmitry Teytelman (Dimtel, Inc.)
FOR MORE INFORMATION
Email: llrf13@lists.lbl.gov